pathfinder

For an ATmega128 running at 16 MHz, timer 1 in Fast PWM mode

TCCR1A = (1 << COM1A1) | (0 << COM1A0)			//	All three PWM outputs
	| (1 << COM1B1) | (0 << COM1B0)			//		Set at TOP, clear on compare match
	| (1 << COM1C1) | (0 << COM1C0)			//
	| (1 << WGM11) | (0 << WGM10);			//	Fast PWM, TOP = ICR1
	
TCCR1B = (0 << ICNC1) | (0 << ICES1)			//	Disable input capture noise canceler, edge select to negative.
	| (1 << WGM13) | (1 << WGM12)			//	Fast PWM, TOP = ICR1
	| (0 << CS12) | (1 << CS11) | (0 << CS10);	//	prescale: clk(i/o) / 8

With a divide-by-8 clock, counting to 0xFFFF takes about 32 ms (or about 30 Hz).

Phase-correct PWM, with clear on up and set on down, and ICR1 = 400d seems to do the trick (20 kHz).